| Product SKU | 9135 |
|---|---|
| Series | EPYC 9005 Series |
| # of CPU Cores | 16 |
| # of Threads | 32 |
| Max. Boost Clock | 4.3 GHz |
| All Core Boost Speed | 4.25 GHz |
| Base Clock | 3.65 GHz |
| L3 Cache | 64 MB |
| Default TDP | 200 W |
| AMD Configurable TDP (cTDP) | 200-240W |
| Platform | SP5 |
| Socket Count | 1P / 2P |
| Launch Date | 10/10/2024 |
| PCI Express Version | PCIe 5.0 x128 |
| System Memory Type | DDR5 |
| Memory Channels | 12 |
| System Memory Specification | 6400 MT/s |
| Per Socket Memory Bandwidth | 614 GB/s |
| Product ID Tray | 100-000001150 |
| Supported Technologies | AMD Infinity Architecture, AMD Infinity Guard |
| Workload Affinity | EDA, High-speed data mgmt (NR, RDBMS), Per core CAE, CFD, FEA |
AMD EPYC, Server CPUs
AMD EPYC 9135 Processor
The AMD EPYC 9135 is a 16-core, 32-thread server processor from the AMD EPYC 9005 Series, with 64 MB L3 cache, 12 memory channels, PCIe 5.0 x128 and a 200 W TDP.
Overview
The AMD EPYC 9135 is a 16-core, 32-thread server processor from the AMD EPYC 9005 Series, built for the SP5 platform, with 64 MB L3 cache and a 200 W TDP. It supports 12 memory channels, DDR5, 6400 MT/s memory speeds, 614 GB/s per-socket bandwidth, and provides PCIe 5.0 x128 across 1P / 2P socket configurations.
Key Features
- Performance: 16 cores and 32 threads, 3.65 GHz base clock, 4.25 GHz all-core boost, 4.3 GHz max boost clock
- 64 MB L3 cache, 200 W TDP, SP5 platform, 1P / 2P socket configurations
- Memory: DDR5, 12 memory channels, memory speeds of 6400 MT/s, 614 GB/s per-socket bandwidth
- I/O: PCIe 5.0 x128
- Technologies: AMD Infinity Architecture, AMD Infinity Guard
- Launched 10/10/2024
Applications
- EDA
- High-speed data mgmt (NR|RDBMS)
- Per core CAE|CFD|FEA
Configuration, availability and lead time depend on the required quantity, platform pairing and delivery destination. Send your requirement to receive a quotation.
